From 5f979614eae087042f0283fa03186e97e5e04f70 Mon Sep 17 00:00:00 2001 From: Ian Campbell Date: Tue, 14 Jan 2014 16:55:04 +0000 Subject: [PATCH] xen: arm: correctly write release target in smp_spin_table_cpu_up flush_xen_data_tlb_range_va() is clearly bogus since it flushes the tlb, not the data cache. Perhaps what was meant was flush_xen_dcache(), but the address was mapped with ioremap_nocache and hence isn't cached in the first place. Accesses should be via writeq though, so do that. Signed-off-by: Ian Campbell Acked-by: Julien Grall --- xen/arch/arm/arm64/smpboot.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/xen/arch/arm/arm64/smpboot.c b/xen/arch/arm/arm64/smpboot.c index 1287c72a65..91464769d1 100644 --- a/xen/arch/arm/arm64/smpboot.c +++ b/xen/arch/arm/arm64/smpboot.c @@ -32,8 +32,7 @@ static int __init smp_spin_table_cpu_up(int cpu) return -EFAULT; } - release[0] = __pa(init_secondary); - flush_xen_data_tlb_range_va((vaddr_t)release, sizeof(*release)); + writeq(__pa(init_secondary), release); iounmap(release); -- 2.30.2